In conventional radio systems or ICs, a frequency synthesizer may be used to generate the transmit carriers and/or the receiver Intermediate Frequency (IF). The synthesizer typically includes a Phase Locked Loop (PLL) frequency multiplier that generates the desired high frequency from a lower oscillator frequency. The lower oscillator frequency is typically generated using a quartz crystal. Typical crystal frequencies used are 12, 16, or 20 MHz.
The synthesizer must be able to generate a range of carrier and IF frequencies across the frequency range of operation of the radio. A conventional radio designed to operate in the worldwide 2.4 GHz ISM band is one example. A typical such device may support eighty four, 1 MHz radio channels, with the lowest channel being 2400 MHz and the highest being 2483 MHz.
Such radio devices or systems are often used to transmit relatively small packets of data, and are bi-directional. One example is a wireless mouse or keyboard. Such devices typically transmit only a few bytes at a time. In order to provide a robust data link, such systems may use a bi-directional radio system, with all data transfers being acknowledged using a handshake packet transmitted by the receiver after correct reception of a data packet. When not actively sending data (or receiving a handshake), such radio systems typically operate in a low power mode, as they are battery powered and power conservation is extremely desirable.
Typically, a conventional radio device of the type described above will transmit a pre-amble (conventionally a 1010101 . . . pattern) at the beginning of a transmission in order to allow the receiver to lock on to the transmitted signal. The receiver may, for example, use the pre-amble pattern to set the thresholds on its data slicer. The current drawn by the synthesizer is typically a significant proportion of the current drawn by the radio in its transmit and receive modes. The pre-amble is typically about 32 μs in duration.
Frequency synthesizers used in conventional applications typically take 100-200 μs to settle at the desired frequency. When switching between transmit and receive modes, it is necessary for the synthesizer to change frequency because the frequency required in the receive mode is offset from the transmit carrier frequency by the IF frequency. The timing of a packet transfer between a transmitter and a receiver may therefore be as shown in FIG. 1.
As can be seen from the timing diagram of FIG. 1, the synthesizer settling period may dominate the time that the radio is in its high current modes. For short data packets, the settling periods drive the power consumed by the radio in transmitting a packet. Any reduction in synthesizer settling current will therefore directly reduce the power consumed in sending a data packet, and so increase the battery life of the radio device.
FIG. 2 is a somewhat schematic block diagram of a conventional synthesizer 200. In the conventional synthesizer implementation 200 shown in FIG. 2, the typical time required for the synthesizer to settle may be significantly less than the worst case. In this case, it is possible for the “transmitter” to begin sending data as soon as the synthesizer is detected as having settled, rather than always waiting for a fixed worst-case lock period. Unfortunately, however, this is not possible when the synthesizer re-settles after the “receiver” sends the handshake and switches between reception and transmission. This is because of the danger that the synthesizer in the “receiver” will settle before that of the “transmitter” and so send the handshake before the “transmitter” is ready to receive the handshake. Therefore, in that case, the fixed, worst case synthesizer settling time must be used.
As shown in FIG. 2, the conventional synthesizer includes a phase divider 210, a loop filter 220, a voltage controlled oscillator (VCO) 230, and a divide by N counter 240. In the conventional method, the phase divider 210 divides the incoming 20 MHz XTAL frequency down to 1 MHz in order to obtain N*1 MHz channel resolution. The VCO frequency is equal to the N counter integer value multiplied by the reference frequency (REF). For example, where:                N0=2400        N1=2401        N2=2402        . . .        N80=2480then:        VCO Freq=N*Ref        2400 Mhz=2400*1 Mhz        2401 Mhz=2401*1 Mhz        2402 Mhz=2402*1 Mhz        . . .        2480 Mhz=2480*1 MhzThe settling time is inversely proportional to the REF frequency, in this case 1 MHz.        
In order to minimize the power consumption in a conventional radio system as shown in FIG. 3, it is necessary to minimize both the typical and worst case synthesizer settling times. In many radio systems of this type, the choice of channel is arbitrary. The large number of channels (for example eighty-four channels) available may be vital in supporting applications where there may be many similar radio systems operating within range of each other, or when operating in the presence of other (non-compatible) radio systems that use that same frequency band, and so block some of the channels from being useable by the radio system in question. However, even in radio system that must support such a large number of channels, in the great majority of applications or installations, it will be rare for every channel to be used.
Referring to FIG. 3, a conventional radio system includes a phase lock loop (PLL) circuit 200 receiving a reference frequency signal (such as from a crystal) and outputting a radio channel frequency. PLL logic 310 provides divide control and PLL loop compensation. In the conventional method, the VCO frequency is equal to the N counter integer value multiplied by the reference frequency divided by an M counter integer value. Assuming a 20 MHz reference frequency, for instance, and an M counter value of 20, the resulting VCO frequencies would be the same as above given the same N counter values.
Unfortunately, this conventional technology has several disadvantages. For instance, existing radio systems with frequency synthesizers used for both TX carrier generation and RX IF generation have the disadvantage that the power consumed when transmitting data is the same on all channels. The channels with the slowest settling time therefore determine the power consumed by the system. Moreover, the higher reference frequency is more immune to filter leakage (PLL drift) and the higher reference frequency is easier to simulate. It would be desirable, therefore, to have a system that enabled faster settling time and lower power use in radio communication.